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Silicon Labs /RM21Z000F1024IM32 /AGC_S /GAINSTEPLIM

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Interpret as GAINSTEPLIM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CFLOOPSTEPMAX 0CFLOOPDEL0HYST0MAXPWRVAR0 (TRANRSTAGC)TRANRSTAGC

Description

No Description

Fields

CFLOOPSTEPMAX

Maximum step in slow loop
CFLOOPDEL

Channel Filter Loop Delay
HYST

Hysteresis
MAXPWRVAR

Maximum Power Variation
TRANRSTAGC

power transient detector Reset AGC

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data